Xilinx PlanAhead是什么

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Xilinx PlanAhead是什么

下面摘了PlanAhead培训教程的前面介绍部分,PlanAhead在ISE11.1以后的版本都已经内嵌ISE,在P&D步骤后就可以打开.这时PlanAhead引入的是ncd网表文件,可以看工程在FPGA布局布线情况,如果时序分析不好,可以给关键路径划分Pblock优先布局布线,从而达到时序要求.同样,PlanAhead还可以引入ucf等文件在IO分配时给出参考.具体的介绍可以去xilinx网站下载userguide.
The PlanAhead™ software is a design analysis and visualization tool.The tool sits between synthesis and implementation.Any commercially available synthesized EDIF and UCF can be used as input.
It also outputs EDIF and UCF for implementation.Once implemented,the results can be imported into the PlanAhead software for further analysis and floorplanning.No Xilinx ISE software tools need to be run prior to starting the PlanAhead software.
Some designers do not even floorplan.They use the PlanAhead software to analyze implementation results.With this physical information,they can understand what RTL changes may be needed to meet the design objectives.

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